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 U4030B
Telephone Speech Circuit
Description
The U4030B is an electronic speech circuit for standard and feature telephones. It replaces the hybrid transformer, earphone and microphone interface and the supply voltage generation for external components, e.g. dialer or microcomputers. Using the U4030B in telephone circuit designs can improve transmission quality and results in cost savings through shorter and more flexible design procedures. It reduces the amount of external components needed. The U4030B uses TEMIC's reliable bipolar technology and is offered in a SO20 package.
Features
D Microphone amplifier with - Symmetrical input - Privacy function - Anticlipping D Built in ear protection D Power down input D Mute input D DTMF interface D Low line impedance during pulse dialing
Benefits
D Independent adjustment of - Transmission gain - Receiving gain - Sidetone suppression - Frequency response D Low-impedance supply voltage for all external blocks D Supply voltage for an electret microphone
Applications
D Standard telephone D Fax machine D Answering machine D Cordless telephone
Block Diagram
GT 11 DTMF PRIV MIC1 MIC2 10 - + MICO 9 ST 5 + - GR 6 - + Ear protection RECO 7
16 12 13
4 TXA REC.ATT.
CK
15 Limiter Mute 3 CLIM 8 MUTE 17 PD 14 GND Power supply U 4030 B 18 SWAMP 1 VM 20 VD 19 2
VL RDC VC
93 7618 e
Figure 1.
Ordering Information
Extended Type Number U4030B-A U4030B-AFL U4030B-AFLG3 Package DIP20 SO20 SO20 Remarks Tube Tube Taped and reeled
Rev. A2, 27-Jul-99
1 (14)
U4030B
Pin Description
10 Input for DTMF signals (ACcoupled). In mute condition a small portion of the signal at this pin is monitored to the receive output GT Input for transmit gain control MIC1 Inverting input of microphone amplifier MIC2 Non-inverting input of microphone amplifier GND Ground (reference point for DC and AC signals) VL Line voltage PRIVACY Active high input to disable microphone amplifier PD Power down input. Active high input for reducing the current consumption of the circuit. Simultaneously VL is shorted by an internal switch SWAMP A resistor connected from this point to ground converts the excess line current into heat in order to prevent the IC from thermal destruction at high line currents RDC Input of power supply VD Unregulated supply voltage for peripheral circuits. Output current capability and output voltage increase with line current DTMF
VM VC CLIM CK ST GR RECO MUTE MICO DTMF
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VD RDC SWAMP PD
11 12 13
PRIVACY VL GND MIC2 MIC1 GT
14 15 16 17
18
Pin 1 2
Symbol VM VC
3 4 5 6 7 8 9 Pin
CLIM CK ST GR RECO MUTE MICO Symbol
Function Supply voltage for an elecret microphone, virtual ground The internal inductance of the circuit is proportional to the value of the capacitor at this pin. A resistor connected to ground may be used to reduce the line voltage Time constant of anticlipping in trans. path Input of receive amplifier Input of sidetone amplifier, must be DC-coupled to VM Input for receive gain control Output of receiving amplifier Active high input to switch circuit in DTMF-condition Output of microphone amplifier Function
19 20
2 (14)
Rev. A2, 27-Jul-99
U4030B
Circuit Description
Reference for all descriptions is figure 9, unless otherwise specified. 300 W and the maximum output current is 300 mA. The VM-pin is virtual ground for the receiving amplifier.
6
Power Supply
DC characteristic
Supply voltage V ( V ) D IL = 50 mA
The power supply stage determines the voltage/ current characteristic of the circuit. The DC-slope is adjusted to 100 W. A resistor connected from Pin 2 to Pin 14 may be used to reduce the line voltage (figure 2).
4 24 mA
19 mA 2
16
12 VL ( V ) RC = 8 RC = 100 kW 4 RDC = 10 kW 0
93 7619 e 93 7620 e
V (MIC) = 10 mVeff 0 0 4 8 12 16 20 Supply current ID ( mA )
Figure 3. Supply voltage, VD
20
40
60
80
100
IL ( mA )
Figure 2. DC characteristics
Supply voltage for an electret microphone ( V )
0
2
1
VL=(0.0033 RDC with: IOFFSET VRS R30 IDC
IDC+IOFFSET)
(R30||RC)+VRS+IRDC
0
= 150 mA = 150 mV = 30 kW = IL - (750 mA + 0.023
3
93 7621 e
4
5
6
Supply voltage VD ( mA )
IL)
Figure 4. Electret microphone supply, VM
VD
An unregulated voltage, VD, is generated to supply the internal and external circuits. The maximum voltage at this pin is limited by an internal Z-diode to a value of 6.2 V. The available output current is shown in figure 3.
Swamp
Line current which is not used for internal and external circuits is converted into heat via resistance Rswamp in order to prevent the IC from thermal destruction at high line currents. The speech circuit will be high ohmic when the voltage at SWAMP reaches 6 V. Typical characteristics for various resistors are shown in figure 5.
VM
The supply voltage for an electret microphone is derived from VD (see figure 4). The output resistance is set to
Rev. A2, 27-Jul-99
3 (14)
U4030B
20 Rswamp = 82 Line voltage V ( V ) L 15 68 47
Electronic Inductance
The AC resistance (Rimp 1 kW) of the telephone should be much higher than the DC resistance (325 W), the latter being decoupled via an electronic inductance. The value of L is given by: L = CVC = 10 W = 10 mF = 30 kW = infinite =3H RDC 30 kW || R
10
5 RDC = 10 kW 0 0
93 7622 e
where RDC CVC R30 RC L
20
40
60
80
100
120
Line current IL ( mA )
Figure 5. Typical DC characteristics for various SWAMP resistors
Transmit
Microphone amplifier The microphone amplifier of U4030B has symmetrical inputs (MIC1 and MIC2) with an input resistance of 60 kW (typical). It has a gain of 29 dB which is adjustable with resistances RS1 and RS2 as follows: GT = VMICO / V(MIC1, MIC2) = 20 log[(RS1 / RS2) + 1] dB
Charge Up Circuit
By OFF HOOK the handset, an integrated charge up circuit provides VD with the whole line current. When VD reaches 2.2 V, the charge up circuit is automatically switched off. The specifications for the German "Deutsche Telekom" (speech readiness, start time) will be fulfilled even with 1000 mF at Pin 20. Figure 6 illustrates the transient behavior of the circuit at IL = 20 mA.
VL charge-up 1 V / div
A low pass function can be realised with CSLP. The corner frequency is given by: fC = 1 / (2p RS1 CSLP)
When the AC level on VL is very high, the amplification of the microphone is reduced by the limiter function. The threshold of the limiter is fixed at 5.5 dBm (typical).
DTMF
The amplification of the DTMF signal is determined by the ratio of RS1 and RS2 as follows:
VD
off
GD = VMICO / VDTMF = 20 log{0.19
[(RS1 / RS2) + 1]}
An external voltage divider is used to adjust the proper DTMF level at line. For monitoring the dialing procedure, an attenuated DTMF signal is sent to the earpiece. The Deutsche Telekom specification is fulfilled with the nominal value of the transmit and receive gain.
93 7623 e
time: 50 ms / div
Figure 6. Charge up characteristics at IL = 20 mA
4 (14)
Rev. A2, 27-Jul-99
U4030B
Transmit Output Amplifier
The output signal of the microphone and DTMF preamplifier is internally coupled to a second amplifier (TXA) which is used to modulate a controlled current source. Assuming a termination of 600 W at a line, the gain from MICO to VL is typically 15.6 dB.
Sidetone
The amplified microphone signal is available at the input of the sidetone loop, MICO. The loop consists of a transmit amplifier (transconductance STX), the impedance at line, receive attenuator (gain) and the sidetone network (figure 7). The sidetone cancellation is achieved by comparing a part of the line signal with the output of the sidetone network (VSTVR). Assuming a real impedance of the telephone (RTel) the optimum sidetone network can be calculated: a = (STX RAPP ZNW= STX R G G) / (1 - STX ZLine RAPP G)
Receive Amplifier
The receive signal is taken from line via capacitor CCK. A resistive attenuator (-32 dB) sets the appropriate input level for the following output amplifier. The input impedance at Pin 4 is typically 80 kW. Voltage gain is: GR = 20 log (Vear / VL) dB = -32 dB + 20 log[(RR1 / RR2) + 1] dB = +1.8 dB
Adjustment to the sensitivities of the handset can be done independently from the sidetone network because receive and transmit gain are set outside of the sidetone loop.
Power Down (PD)
The speech circuit is switched low ohmic by selecting a high level at PD during the pulse dialling. The voltage drop across the IC will be typically 1.5 V. During this time the capacitor CVD will not be discharged, because an internal power down switches off all internal amplifiers. In order to avoid cracks, it is recommended to activate power down while sending the dial pulses (figure 8).
The adjustment range for receive gain GR is typically -4 dB to +8 dB. The built-in ear protection limits the output swing at Pin 7 to 2.4 Vpp (VD > 4 V). For high receive gain, the maximum undistorted output level might not be sufficient due to clipping by ear protection.
R
aR
ZNW + - V ST VR G = 1/40 VH
MICO Mic. VL STX = 18.8 mS RTEL ZL
93 7624 e
Figure 7. Schematic of the sidetone
Rev. A2, 27-Jul-99
5 (14)
U4030B
PD
VL
Pulse "4" "2"
93 7625 e
Figure 8. Recommended timing diagram for power down diagram
Absolute Maximum Ratings
Parameters Line current (according to figure11) DC line voltage Storage temperature range Junction temperature Ambient temperature range Power dissipation, Tamb = 60_C Symbol IL VL Tstg Tj Tamb Ptot Ptot Value 200 16 -55 to +150 150 -25 to +65 820 640 Unit mA V C C C mW mW
DIP20 SO20
Thermal Resistance
Junction ambient Parameters DIP20 SO20 Symbol RthJA RthJA Value 110 140 Unit K/W K/W
6 (14)
Rev. A2, 27-Jul-99
U4030B
Electrical Characteristics
f = 1000 Hz, Tamb = 25_C, reference point Pin 14, unless otherwise specified Parameters Test Conditions / Pins DC characteristics (figure 11) DC voltage in speech mode IL = 19 mA IL = 26 mA IL = 60 mA Transmit amplifier and sidetone reduction (figure 12) Input resistance Transmit gain IL = 24 mA Gain variation 19 mA x IL x 60 mA Noise at line, psophometrically weighted RL = 600 W ZRECO = 68 nF ZMIC = 68 nF IL = 19 to 60 mA RL R d x 5% VMIC = 5.4 mV Symbol VL Min. 6.2 10.0 RI GT DGT
nO
Typ. 6.5 7.2 10.5 60.0 44.7
Max. 6.8 11.0 80.0 45.2 +0.5
Unit V V V kW dB dB
45.0 44.2 -0.5
-75.0 GST VOmax 33.5 5.5
dBmp dB dBm
Sidetone gain (figure 12) Max. output voltage
6.3
Common mode rejection ratio Mute: reduction of ZRECO = 68 nF voltage amplification Privacy: reduction of voltage amplification Receiving amplifier (figure 13) Gain ZRECO = 68 nF IL = 24 mA Gain variation 19 mA x IL x 60 mA Noise at earphone psophometrically weighted IL = 19 to 60 mA Load T, R = 600 W ZRECO = 68 nF ZMIC = 68 nF IL = 19 to 60 mA ZRECO = 68 nF d x 2% IL = 19 to 60 mA ZRECO = 68 nF VGEN = 3 Vrms Zear = 68 nF
CMRR 60.0 60.0
80.0
dB dB dB
GR DGR nI
-3.9 -0.5
-3.4
-2.9 0.5 -78
dB dB dBmp
Max. output voltage
VOmax
600
650
mVrms
Switching threshold of ear protection Voltage amp. from DTMF to RECO Output impedance Power down (figure 14) PD-off input voltage PD-on input voltage Input current Line voltage Input current consumption at VD Rev. A2, 27-Jul-99
0.7
1.3
Vrms
-7
-4
-1 10
dB W V V mA V mA
VI = 6 V PD on, IL = 24 mA PD on
VI VI II VL ID
0.3 2 130 1.5 100
7 (14)
U4030B
Parameters Mute input, (figure 14) MUTE input current Test Conditions / Pins VMUTE = 6 V VMUTE = 0.3 V Symbol IMUTE VMUTE VMUTE VD Min. Typ. Max. 120 -25 0.3 1.5 4.0 4.5 Unit mA mA V V V
MUTE-off input voltage MUTE-on input voltage Supply voltages (figure 12) Output voltage IL = 19 mA ID = 4.5 mA VMIC = 10 mV IL = 50 mA ID = 15 mA VMIC = 10 mV Output voltage IL = 19 mA ID = 3 mA IM = 300 mA Output current Output resistance DTMF-amplifier (figure 14) Input resistance DTMF-gain Load = ZR 0 < Rv < 1530 W Max. output voltage IL = 19 to 60 mA Load = ZR d x 2% Privacy (figure 14) PRIV-on input voltage PRIV-off input voltage Input current VPRIV = 6 V
5.5
6.2
V
VM
2.2
V mA W kW dB Vrms
IM RO RD GD 22 24.7 1.8
300 300 31 26 37 27
VPRIV VPRIV IPRIV
2 0.8 60
V V mA
R PD 150k D R
VD
20 mA
MUTE
20k D R 50k
93 7630 e
Figure 9. PD input
Figure 10. Mute input
8 (14)
Rev. A2, 27-Jul-99
Rev. A2, 27-Jul-99
Figure 11. Application Circuit 93 7626 e
CK 68n CVM 10 m CLIM 470 n CR 2.2 m R4 12 k CRNW2 100 n RNW2 18 k RR2 680 RR1 33 k VC 10 m
U 4030 B
VM
VC CLIM CK ST GR RECO MUTE MICO DTMF
VD
RDC SWAMP PD PRIV VL GND MIC 2 MIC 1 GS
1000m 10 68
1k 15V 68n 47 m VL
600 100 m
ID
RNW3 CRNW3 2.7 k 100 n RNW4 390 12k 10m 150 470 n 2.2 m 430
CRNW4 53n
DTMF
MIC1
MIC2
U4030B
9 (14)
U4030B
10 (14)
CK 68 n VC 10 m ID
IVM
CVM
U 4030 B
CVD 10 RSWAMP 68 VPRIV
VM VC VD RDC SWAMP PD PRIV VL GND MIC 2 MIC 1 GS
1000 m
10 m CLIM 470 n
CK ST CLIM
CR PR 1
RECO GR
PR 2
2.2 m 33 k
MUTE MICO DTMF
680 15 V
RIMP 1k 68 n 47 m
R4 12 k
RL 600 VL 100 m
IL
CRNW 2 RNW 3 RS 1 12 k RS2 430 VMUTE CS DTMF ZEAR 68 n 470 n MIC 1 2.2 m ZM 68 n 2.7 k 100 n CRECO 10 m RNW 4 390 ROUT 150
RNW 2
CRNW 3
Figure 12. Transmit gain
MIC 2 DTMF VMIC
100 n
18 k
CRNW4
53 n
Rev. A2, 27-Jul-99
93 7627 e
DTMF 470 n 68 n 10m CK
2.2 m 680
RECO MUTE MICO DTMF CS MIC1 MIC2 GND
33 k RIMP 1k 15 V
A
RL 600 100 m IL 68 n 47 m RS2 430 VGEN CS 2.2 m ZM MIC1 68 n MIC2
Rev. A2, 27-Jul-99
VC
CVM
U 4030 B
CVD RDC 1000 m RSWAMP 68 10 VM VD
RDC
10m CLIM
CLIM SWAMP VC
470 n
CK ST PRIV VL PD
CR RR1
GR
RR2
CRNW2 RNW3 RS1 12 k CRECO 10 m ROUT 150 CRNW4 53 n ZEAR VEAR 68 n 2.7 k 100 n CRNW3
RNW2
100 n
18 k
C RNW4 390
Figure 13. Receiving gain and sidetone amplification
470 n
VGEN
U4030B
11 (14)
93 7628 e
U4030B
12 (14)
VDTMF VC 470 n CK 68 n CVD RDC RSWAMP 10 IPD VPRIV 68 1000 m 10m ID
AC
CVM
U4030B
VM VD RDC SWAMP PD PRIV VL GND MIC2 MIC1 GS VC
10m CLIM 470 n
CK ST CLIM
CR PR1
RECO GR
PR2 15 V
2.2 m 33 k
MUTE MICO DTMF
680
R4 12 k
RIMP 1k 68 n 47 m
ZR IL VL 100m
CRNW2 CRNW3 100 n CRECO 1.5 n ZM ROUT 150 IMUTE 68 n RS2 ZEAR 68 n VMUTE 430 CS 2.2 m 10m CSLP 12 k RS1
Figure 14. DTMF gain
RNW2
RNW3
100 n
18 k
2.7 k
RNW4 390
CRNW4
100 n
93 7629 e
Rev. A2, 27-Jul-99
U4030B
Package Information
Package DIP20 (CEI)
Dimensions in mm
26.42 25.40 7.87 7.37
3.80 3.05 0.89 0.38 0.38 0.20 2.54 22.86 20 11 6.6 6.1
3.81 3.18 1.65 1.14
9.40 7.62
technical drawings according to DIN specifications 13042
1
10
Package SO20
Dimensions in mm
12.95 12.70
9.15 8.65 7.5 7.3
2.35
0.4 1.27 11.43 20 11
0.25 0.10 10.50 10.20
0.25
technical drawings according to DIN specifications 13038
1
10
Rev. A2, 27-Jul-99
13 (14)
U4030B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
14 (14)
Rev. A2, 27-Jul-99


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